1. Technical Field
The present disclosure relates to a package structure, and more particularly, to an embedded package structure.
2. Description of Related Art
A schematic sectional view of a conventional embedded package structure 100 is shown in FIG. 1, which is a single-chip embedded structure including chips 110, metal layers 120, an insulation material layer 130 and two passivation layers 140.
As shown In FIG. 1, the chips 110, the metal layers 120 and an insulation material layer 130 are sandwiched between the passivation layers 140. The chips 110 are individually positioned in the insulation material layer 130, and electrically connected to other chips 110 through the metal layers 120.
Since there are the numerous metal routing layers connecting to the chips, parasitic effects may appear in the embedded package structure to damage the chips. Besides, due to the numerous metal routing layers, the signal transmission distance in the single-chip embedded structure is so long that the intensity and quality of the signal may deteriorate. On the other way, the conventional embedded package structure having lots of chips inside always has a large size, which is unfavorable in design of a compact device.
Therefore, there is a need for an improved embedded package structure and a method for manufacturing the same, so as to solve the problems met in the art.